Developer Guide and Reference

Contents

Miscellaneous Intrinsics

The intrinsics listed here are designed for the Intel® Pentium® 4 processor with Streaming SIMD Extensions 3 (Intel® SSE3). The prototypes for these intrinsics are in the
pmmintrin.h
header file.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>

_mm_monitor

extern void _mm_monitor(void const *p, unsigned extensions, unsigned hints);
Generates the
MONITOR
instruction. This sets up an address range for the monitor hardware using
p
to provide the logical address, and will be passed to the monitor instruction in register
EAX
. The
extensions
parameter contains optional extensions to the monitor hardware which will be passed in
ECX
. The
hints
parameter will contain hints to the monitor hardware, which will be passed in
EDX
. A non-zero value for
extensions
will cause a general protection fault.

_mm_mwait

extern void _mm_mwait(unsigned extensions, unsigned hints);
Generates the
MWAIT
instruction. This instruction is a hint that allows the processor to stop execution and enter an implementation-dependent optimized state until occurrence of a class of events. In future processor designs,
extensions
and
hints
parameters may be used to convey additional information to the processor. All non-zero values of
extensions
and
hints
are reserved. A non-zero value for
extensions
will cause a general protection fault.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804