Developer Guide and Reference

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Packed Format Conversion Intrinsics

These Intel® Streaming SIMD Extensions 4 (Intel® SSE4) intrinsics convert a packed integer to a zero-extended or sign-extended integer with wider type. The prototypes for these intrinsics are in the
smmintrin.h
file.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>
Intrinsic Syntax
Operation
Corresponding
Intel® SSE4 Instruction
__m128i _mm_cvtepi8_epi32(__m128i a)
Sign extend four bytes into four doublewords
PMOVSXBD
__m128i _mm_cvtepi8_epi64 (__m128i a)
Sign extend two bytes into two quadwords
PMOVSXBQ
__m128i _mm_cvtepi8_epi16(__m128i a)
Sign extend eight bytes into eight words
PMOVSXBW
__m128i _mm_cvtepi32_epi64(__m128i a)
Sign extend two doublewords into two quadwords
PMOVSXDQ
__m128i _mm_cvtepi16_epi32(__m128i a)
Sign extend four words into four doublewords
PMOVSXWD
__m128i _mm_cvtepi16_epi64(__m128i a)
Sign extend two words into two quadwords
PMOVSXWQ
__m128i _mm_cvtepu8_epi32(__m128i a)
Zero extend four bytes into four doublewords
PMOVZXBD
__m128i _mm_cvtepu8_epi64(__m128i a)
Zero extend two bytes into two quadwords
PMOVZXBQ
__m128i _mm_cvtepu8_epi16(__m128i a)
Zero extend eight bytes into eight words
PMOVZXBW
__m128i _mm_cvtepu32_epi64(__m128i a)
Zero extend two doublewords into two quadwords
PMOVZXDQ
__m128i _mm_cvtepu16_epi32(__m128i a)
Zero extend four words into four doublewords
PMOVZXWD
__m128i _mm_cvtepu16_epi64(__m128i a)
Zero extend two words into two quadwords
PMOVZXWQ

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804