The prototypes for Intel® Streaming SIMD Extensions (Intel® SSE) intrinsics for miscellaneous operations are in the
To use these intrinsics, include the
immintrin.hfile as follows:
The results of each intrinsic operation are placed in registers. The information about what is placed in each register appears in the tables below, in the detailed explanation of each intrinsic. R, R0, R1, R2, and R3 represent the registers in which results are placed.
Corresponding Intel® SSE Instruction
Set low word, pass in three high values
Move High to Low
Move Low to High
Create four-bit mask
Return vector of type __m128 with undefined elements.
This is a utility intrinsic that returns some arbitrary value.
Selects four specific SP FP values from
b, based on the mask
imm8. The mask must be an immediate. See Macro Function for Shuffle Using Intel® Streaming SIMD Extensions for a description of the shuffle semantics.
Selects and interleaves the upper two SP FP values from
Selects and interleaves the lower two SP FP values from
Sets the low word to the SP FP value of
b. The upper three SP FP values are passed through from