Developer Guide and Reference

Contents

Store Intrinsics

The prototypes for Intel® Streaming SIMD Extensions (Intel® SSE) intrinsics for store operations are in the
xmmintrin.h
header file.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>
The description for each intrinsic contains a table detailing the returns. In these tables, p[
n
] is an access to the
n
element of the result.
Intrinsic Name
Operation
Corresponding
Intel® SSE Instruction
_mm_storeh_pi
Store high
MOVHPS mem, reg
_mm_storel_pi
Store low
MOVLPS mem, reg
_mm_store_ss
Store the low value
MOVSS
_mm_store1_ps
Store the low value across all four words, address aligned
Shuffling + MOVSS
_mm_store_ps
Store four values, address aligned
MOVAPS
_mm_storeu_ps
Store four values, address unaligned
MOVUPS
_mm_storer_ps
Store four values, in reverse order
MOVAPS + Shuffling

_mm_storeh_pi

void _mm_storeh_pi(__m64 *p, __m128 a);
Stores the upper two SP FP values to the address
p
.
*p0
*p1
a2
a3

_mm_storel_pi

void _mm_storel_pi(__m64 *p, __m128 a);
Stores the lower two SP FP values of
a
to the address
p
.
*p0
*p1
a0
a1

_mm_store_ss

void _mm_store_ss(float * p, __m128 a);
Stores the lower SP FP value.
*p
a0

_mm_store1_ps

void _mm_store1_ps(float * p, __m128 a);
Stores the lower SP FP value across four words.
p[0]
p[1]
p[2]
p[3]
a0
a0
a0
a0

_mm_store_ps

void _mm_store_ps(float *p, __m128 a);
Stores four SP FP values. The address must be 16-byte-aligned.
p[0]
p[1]
p[2]
p[3]