Developer Guide and Reference

Contents

Subtraction Intrinsics

These Supplemental Streaming SIMD Extensions 3 (SSSE3) intrinsics are used for horizontal subtraction. The prototypes for these intrinsics are in
tmmintrin.h
.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>

_mm_hsub_epi16

extern __m128i _mm_hsub_epi16(__m128i a, __m128i b);
Subtract horizontally packed signed words.
Interpreting
a
,
b
, and
r
as arrays of 16-bit signed integers:
for (i = 0; i < 4; i++) { r[i] = a[2*i] - a[2i+1]; r[i+4] = b[2*i] - b[2*i+1]; }

_mm_hsub_epi32

extern __m128i _mm_hsub_epi32(__m128i a, __m128i b);
Subtracts horizontally packed signed doublewords.
Interpreting
a
,
b
, and
r
as arrays of 32-bit signed integers:
for (i = 0; i < 2; i++) { r[i] = a[2*i] - a[2i+1]; r[i+2] = b[2*i] - b[2*i+1]; }

_mm_hsubs_epi16

extern __m128i _mm_hsubs_epi16(__m128i a, __m128i b);
Subtracts horizontally packed signed words with signed saturation.
Interpreting
a
,
b
, and
r
as arrays of 16-bit signed integers:
for (i = 0; i < 4; i++) { r[i] = signed_saturate_to_word(a[2*i] - a[2i+1]); r[i+4] = signed_saturate_to_word(b[2*i] - b[2*i+1]); }

_mm_hsub_pi16

extern __m64 _mm_hsub_pi16(__m64 a, __m64 b);
Subtracts horizontally packed signed words.
Interpreting
a
,
b
, and
r
as arrays of 16-bit signed integers:
for (i = 0; i < 2; i++) { r[i] = a[2*i] - a[2i+1]; r[i+2] = b[2*i] - b[2*i+1]; }

_mm_hsub_pi32

extern __m64 _mm_hsub_pi32(__m64 a, __m64 b);
Subtracts horizontally packed signed doublewords.
Interpreting
a
,
b
, and
r
as arrays of 32-bit signed integers:
r[0] = a[0] - a[1]; r[1] = b[0] - b[1];

_mm_hsubs_pi16

extern __m64 _mm_hsubs_pi16(__m64 a, __m64 b);
Subtracts horizontally packed signed words with signed saturation.
Interpreting
a
,
b
, and
r
as arrays of 16-bit signed integers:
for (i = 0; i < 2; i++) { r[i] = signed_saturate_to_word(a[2*i] - a[2i+1]); r[i+2] = signed_saturate_to_word(b[2*i] - b[2*i+1]); }

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804