Developer Guide and Reference

Contents

_subborrow_u32(), _subborrow_u64()

Computes sum of 32/64 bit unsigned integer value with borrow-in value and then subtracts the result from a 32/64 bit unsigned integer value. The corresponding 4th Generation Intel® Core™ Processor extension instruction is
V
.

Syntax

extern unsigned char _subborrow_u32(unsigned char b_in, unsigned int src1, unsigned int src2, unsigned int *diff_out);
extern unsigned char _subborrow_u64(unsigned char b_in, unsigned __int64 src1, unsigned __int64 src2, unsigned __int64 *diff_out);
Parameters
b_in
Borrow-in value for addition operation
src1
32/64 bit source integer for addition operation
src2
32/64 bit source integer for subtraction operation
*diff_out
Pointer to memory location where result is stored
Description
Computes the sum of a 32/64 bit wide unsigned integer value
src2
and a borrow-in value
b_in
and then subtracts result of the sum from 32/64 bit wide unsigned integer value
src1
. The borrow-in value is considered '
1
' for any non-zero
b_in
input value, or '
0
' otherwise. The difference is then stored to a memory location referenced by
diff_out
argument:
*diff_out = src1 - (src2 + (b_in !=0 ? 1 : 0))
This intrinsic does not perform validity checking of the memory address pointed to by
diff_out
, thus it cannot be used to find out if a subtraction produces borrow-out without storing the result of the subtraction.
Returns
Returns borrow-out value generated by subtraction operation. The result of the subtraction is stored into memory location pointed by
diff_out
argument.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804