Developer Guide and Reference

Contents

_rdseed16_step/ _rdseed32_step/ _rdseed64_step

Generates random numbers of 16/32/64 bit wide random integers. The corresponding 4th Generation Intel® Core™ instruction is
RDSEED
.

Syntax

extern int _rdseed16_step(unsigned short *random_val);
extern int _rdseed32_step(unsigned int *random_val);
extern int _rdseed64_step(unsigned __int64 *random_val);
Parameters
*random_val
Random value written to the given memory location
Description
These intrinsics generate random numbers of 16/32/64 bit wide random integers. These intrinsics are mapped to a code-sequence based on the
RDSEED
instruction. The result code depends on the context in which the intrinsics were used and on the target operating system.
The
_rdrand64_step()
intrinsic can be used only on systems with the 64-bit registers support.
The generated random value is written to the given memory location and the success status is returned: '
1
' if the hardware returned a valid random value, and '
0
' otherwise.
The difference between
RDSEED
and
RDRAND
intrinsics is that
RDSEED
intrinsics meet the NIST SP 800-90B and NIST SP 800-90C standards, while the
RDRAND
meets the NIST SP 800-90A standard.
Returns
The generated random value is written to the given memory location and the success status is returned. Returns '
1
' if the hardware returns a random 16/32/64 bit value (success). Returns '
0
' otherwise (failure).

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804