Developer Guide and Reference

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Intrinsics for Reading and Writing the Content of Extended Control Registers

This group of intrinsics includes two intrinsics to read from and write to extended control registers (XCRs). Currently, the only such register defined is
XCR0
,
XFEATURE_ENABLED_MASK
register. This register specifies the set of processor states that the operating system enables on that processor, for example x87 FPU states, SSE states, and other processor extended states that Intel® 64 architecture may introduce in the future.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>

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