Developer Guide and Reference

Contents

Overview: Intrinsics for Managing Extended Processor States and Registers

The Intel® C++ Compiler provides twelve intrinsics for managing the extended processor states and extended registers. These intrinsics are available for the IA-32 and Intel® 64 architectures running on supported operating systems.
To use these intrinsics, include the
immintrin.h
file as follows:
#include <immintrin.h>
The intrinsics map directly to the hardware system instructions described in "Intel® 64 and IA-32 Architectures Software Developer's Manual, volumes 1, 2a, and 2b" and " Intel® Advanced Vector Extensions Programming Reference ".
The intrinsics for managing the extended processor states and extended registers include:
  • Two intrinsics to read from and write to the specified extended control register. These intrinsics map to
    XGETBV
    and
    XSETBV
    instructions.
  • Four intrinsics to save and restore the current state of the
    x87 FPU
    ,
    MMX
    ,
    XMM
    , and
    MXCSR
    registers. These intrinsics map to
    FXSAVE
    ,
    FXSAVE64
    ,
    FXRSTOR
    , and
    FXRSTOR64
    instructions.
  • Six intrinsics to save and restore the current state of the
    x87 FPU
    ,
    MMX
    ,
    XMM
    ,
    YMM
    , and
    MXCSR
    registers. These intrinsics map to
    XSAVE
    ,
    XSAVE64
    ,
    XSAVEOPT
    ,
    XSAVEOPT64
    ,
    XRSTOR
    , and
    XRSTOR64
    instructions.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804