Developer Guide and Reference

Contents

Quiet-Computational Operations Functions

Many routines in the
libbfp754
Library are more optimized for Intel® microprocessors than for non-Intel microprocessors.
The Intel® IEEE 754-2008 Binary Conformance Library supports the following functions for quiet-computational operations:

copy

Description:
The function copies input floating-point number
x
to output in the same floating-point format, without any change to the sign.
Calling interface:
float __binary32_copy(float x);
double __binary64_copy(double x);
When the input is a signaling
NaN
, two different outcomes are allowed by the standard. The operation could either signal invalid exception with quieted signaling
NaN
as output, or deliver signaling
NaN
as output without signaling any exception.

negate

Description:
The function copies input floating-point number
x
to output in the same floating-point format, reversing the sign.
Calling interface:
float __binary32_negate(float x);
double __binary64_negate(double x);
When the input is a signaling
NaN
, two different outcomes are allowed by the standard. The operation could either signal invalid exception with quieted signaling
NaN
as output, or deliver signaling
NaN
as output without signaling any exception.

abs

Description:
The function copies input floating-point number
x
to output in the same floating-point format, setting the sign to positive.
Calling interface:
float __binary32_abs(float x);
double __binary64_abs(double x);
When the input is a signaling
NaN
, two different outcomes are allowed by the standard. The operation could either signal invalid exception with quieted signaling
NaN
as output, or deliver signaling
NaN
as output without signaling any exception.

copysign

Description:
The function copies input floating-point number
x
to output in the same floating-point format, with the same sign as
y
.
Calling interface:
float __binary32_copysign(float x, float y);
double __binary64_copysign(double x, double y);
When the first input is a signaling
NaN
, two different outcomes are allowed by the standard. The operation could either signal invalid exception with quieted signaling
NaN
as output, or deliver signaling
NaN
as output without signaling any exception.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804