Developer Guide and Reference

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Fvec Notation Conventions

This reference uses the following conventions for syntax and return values.

Fvec Classes Syntax Notation

Fvec classes use the syntax conventions shown the following examples:
[Fvec_Class] R = [Fvec_Class] A [operator][Ivec_Class] B;
Example 1:
F64vec2 R = F64vec2 A & F64vec2 B;
[Fvec_Class] R = [operator]([Fvec_Class] A,[Fvec_Class] B);
Example 2:
F64vec2 R = andnot(F64vec2 A, F64vec2 B);
[Fvec_Class] R [operator]= [Fvec_Class] A;
Example 3:
F64vec2 R &= F64vec2 A;
where
[operator]
is an operator (for example,
&, |, or ^
)
[Fvec_Class]
is any
Fvec
class (
F64vec2
,
F32vec4
, or
F32vec1
)
R
,
A
,
B
are declared
Fvec
variables of the type indicated.

Return Value Notation

Because the
Fvec
classes have packed elements, the return values typically follow the conventions presented in the Return Value Convention Notation Mappings table.
F32vec4
returns four single-precision, floating-point values (R0, R1, R2, and R3);
F64vec2
returns two double-precision, floating-point values, and
F32vec1
returns the lowest single-precision floating-point value (R0).
Return Value Convention Notation Mappings
Example 1:
Example 2:
Example 3:
F32vec4
F64vec2
F32vec1
R0 := A0 & B0;
R0 := A0 andnot B0;
R0 &= A0;
x
x
x
R1 := A1 & B1;
R1 := A1 andnot B1;
R1 &= A1;
x
x
N/A
R2 := A2 & B2;
R2 := A2 andnot B2;
R2 &= A2;
x
N/A
N/A
R3 := A3 & B3
R3 := A3 andhot B3;
R3 &= A3;
x
N/A
N/A

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804