Rules for Operators
To use operators with the
Ivecclasses you must use one of the following three syntax conventions:
[ Ivec_Class ] R = [ Ivec_Class ] A [ operator ][ Ivec_Class ] B
I64vec1 R = I64vec1 A & I64vec1 B;
[ Ivec_Class ] R =[ operator ] ([ Ivec_Class ] A,[ Ivec_Class ] B)
I64vec1 R = andnot(I64vec1 A, I64vec1 B);
[ Ivec_Class ] R [ operator ]= [ Ivec_Class ] A
I64vec1 R &= I64vec1 A;
operator] represents an operator (for example, &, |, or ^ )
Ivec_Class] represents an
Bvariables are declared using the pertinent
The table that follows shows automatic and explicit sign and size typecasting. "Explicit" means that it is illegal to mix different types without an explicit typecasting. "Automatic" means that you can mix types freely and the compiler will do the typecasting for you.
Summary of Rules Major Operators
Other Typecasting Requirements
Explicit typecasting is required for different types used in non-logical expressions on the right side of the assignment.
Addition and Subtraction
Casting Required to ensure arithmetic shift.
Explicit casting is required for signed classes for the less-than or greater-than operations.
Explicit casting is required for signed classes for less-than or greater-than operations.
Data Declaration and Initialization
The following table shows literal examples of constructor declarations and data type initialization for all class sizes. All values are initialized with the most significant element on the left and the least significant to the right.
Declaration and Initialization Data Types for Ivec Classes
I128vec1 A; Iu8vec16 A;
I64vec1 A; Iu8vec8 A;
I128vec1 A(__m128 m); Iu16vec8(__m128 m);
I64vec1 A(__m64 m);Iu8vec8 A(__m64 m);
I64vec1 A = __int64 m; Iu8vec8 A =__int64 m;
I64vec1 A = int i; Iu8vec8 A = int i;
I32vec2 A(int A1, int A0);
Is32vec2 A(signed int A1, signed int A0);
Iu32vec2 A(unsigned int A1, unsigned int A0);
I32vec4 A(int A3, int A2, int A1, int A0);
Is32vec4 A(signed int A3, ..., signed int A0);
Iu32vec4 A(unsigned int A3, ..., unsigned int A0);
I16vec4 A(short A3, short A2, short A1, short A0);
Is16vec4 A(signed short A3, ..., signed short A0);
Iu16vec4 A(unsigned short A3, ..., unsigned short A0);
I16vec8 A(short A7, short A6, ..., short A1, short A0);
Is16vec8 A(signed A7, ..., signed short A0);
Iu16vec8 A(unsigned short A7, ..., unsigned short A0);
I8vec8 A(char A7, char A6, ..., char A1, char A0);
Is8vec8 A(signed char A7, ..., signed char A0);
Iu8vec8 A(unsigned char A7, ..., unsigned char A0);
I8vec16 A(char A15, ..., char A0);
Is8vec16 A(signed char A15, ..., signed char A0);
Iu8vec16 A(unsigned char A15, ..., unsigned char A0);