• 19.1
  • 12/16/2019
  • Public Content
Contents

intel_omp_taskq

For Intel legacy tasking, specifies an environment for the while loop in which to queue the units of work specified by the enclosed
task
pragma.

Syntax

#pragma intel_omp_taskq
[
clause
[[
,
]
clause
]
...
]
structured-block
Arguments
clause
Can be any of the following:
private
(
variable-list
)
Creates a private, default-constructed version for each object in
variable-list
for the
taskq
. It also implies
captureprivate
on each enclosed task. The original object referenced by each variable has an indeterminate value upon entry to the construct, must not be modified within the dynamic extent of the construct, and has an indeterminate value upon exit from the construct.
firstprivate
(
variable-list
)
Creates a private, copy-constructed version for each object in
variable-list
for the
taskq
. It also implies
captureprivate
on each enclosed task. The original object referenced by each variable must not be modified within the dynamic extent of the construct and has an indeterminate value upon exit from the construct.
lastprivate
(
variable-list
)
Creates a private, default-constructed version for each object in
variable-list
for the
taskq
. It also implies
captureprivate
on each enclosed task. The original object referenced by each variable has an indeterminate value upon entry to the construct, must not be modified within the dynamic extent of the construct, and is copy-assigned the value of the object from the last enclosed task after that task completes execution.
reduction
(
operator
:
variable-list
)
Performs a reduction operation with the given operator in enclosed task constructs for each object in
variable-list
.
operator
and
variable-list
are defined the same as in the OpenMP* Specifications.
ordered
Organizes ordered constructs in enclosed
task
constructs in original sequential execution order. The
taskq
pragma, to which the
ordered
is bound, must have an
ordered
clause present.
nowait
Removes the implied barrier at the end of the
taskq
. Threads may exit the
taskq
construct before completing all the
task
constructs queued within it.
Description
The
intel_omp_taskq
pragma specifies the environment within which the enclosed units of work (tasks) are to be executed. From among all the threads that encounter a
intel_omp_taskq
pragma, one is chosen to execute it initially.
Conceptually, the
intel_omp_taskq
pragma causes an empty queue to be created by the chosen thread, and then the code inside the
taskq
block is executed as single-threaded. All the other threads wait for work to be queued on the conceptual queue.
The
intel_omp_taskq
pragma specifies a unit of work, potentially executed by a different thread. When a
task
pragma is encountered lexically within a
taskq
block, the code inside the
task
block is conceptually queued on the queue associated with the
taskq
. The conceptual queue is disbanded when all work queued on it finishes, and when the end of the
taskq
block is reached.
This pragma affects parallelization done using the
Qopenmp
(Windows*) or
qopenmp
(Linux*
or
macOS*
) option. Options that use OpenMP* are available for both Intel® and non-Intel microprocessors, but these options may perform additional optimizations on Intel® microprocessors than they perform on non-Intel microprocessors. The list of major, user-visible OpenMP* constructs and features that may perform differently on Intel® vs. non-Intel microprocessors includes: locks (internal and user visible), the SINGLE construct, barriers (explicit and implicit), parallel loop scheduling, reductions, memory allocation, and thread affinity and binding.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804