Developer Guide and Reference

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simd

Enforces vectorization of loops.

Syntax

#pragma simd
[
clause
[ [
,
]
clause
]
...
]
Arguments
clause
Can be any of the following:
vectorlength
(
n1
[,
n2
]...)
Where
n
is a vector length (VL). It must be an integer that is a power of 2; the value must be 2, 4, 8, or 16. If you specify more than one
n
, the vectorizor will choose the VL from the values specified.
Causes each iteration in the vector loop to execute the computation equivalent to
n
iterations of scalar loop execution. Multiple
vectorlength
clauses are merged as a union.
vectorlengthfor
(
data type
)
Where
data type
must be one of built-in integer types (8-, 16-, 32-, or 64-bit), pointer types (treated as pointer-sized integer), floating point types (32- or 64-bit), or complex types (64- or 128-bit). Otherwise, behavior is undefined.
Causes each iteration in the vector loop to execute the computation equivalent to
n
iterations of scalar loop execution where
n
is computed from
size_of_vector_register
/
sizeof(
data type
)
.
For example,
vectorlengthfor(float)
results in
n=4
for Intel® Streaming SIMD Extensions (Intel® SSE2) to Intel SSE4.2 targets (packed float operations available on 128bit XMM registers) and
n=8
for an Intel® Advanced Vector Extensions (Intel® AVX) target (packed float operations available on 256bit YMM registers).
vectorlengthfor(int)
results in
n=4
for Intel SSE2 to Intel AVX targets.
vectorlength()
and