Developer Guide and Reference

Contents

GAP Message (Diagnostic ID 30526)

Message

To parallelize the loop at line %d, annotate the routine %s with %s.

Advice

If the loop contains a call to a function, the compiler cannot parallelize the loop without more information about the function being called.
However, if the function being called in the loop is
a const function
or
a concurrency-safe function,
then the call does not inhibit parallelization of the loop.
Example
Consider the following:
#define N 10000 double A[N], B[N]; int bar(int); void foo(){ int i; for (i=0;i<N;i++){ A[i] = B[i] * bar(i); } }
In this case, the compiler does not parallelize the loop because it is not safe to do so without further information about routine
bar
, which is being called.
If you determine it is safe to do so, you can modify the program code as follows:
#define N 10000 double A[N], B[N]; __declspec(const) int bar(int); void foo(){ int i; for (i=0;i<N;i++){ A[i] = B[i] * bar(i); } }
If you determine it is safe to do so, an alternative way you can modify the program code is as follows:
#define N 10000 double A[N], B[N]; __declspec(concurrency_safe(profitable)) int bar(int); void foo(){ int i; for (i=0;i<N;i++){ A[i] = B[i] * bar(i); } }
Verify
Confirm the routine satisfies the semantics of this annotation. A weaker annotation able to achieve a similar effect is
__declspec(concurrency_safe(profitable)
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804