Enabling Timestamps in Intel® PT Output
!enabletimestamps [/tsc] [/mtc] [/cyc] [/here] [/mtcfreq <expr>] [/cycthres <expr>] /tsc - Enable TSC(Time Stamp Counter) /mtc - Enable MTC(Mini Time Counter) /mtcfreq <expr> - MTCFrequency value 0 - max frequency possible options shown if parameter is not provided. (For examlpe b01001 allow [0 and 3]) (space-delimited) /cyc - Enable Cycle-Accurate Mode /cycthres <expr> - CycThreshold value 0 - no threshold CycThresh>0, CYC packets are generated only after a minimum number of cycles have passed since the last CYC packet possible options shown if parameter is not provided. (For example b01111 allow [0,1,2,3]) (space-delimited) /here - Enable on the currently selected processor only Enable timestamps (only JTAG connection)
Types of Timestamp Packets in Intel® PT
- Time Stamp Counter (TSC) packets contain the approximate wall-clock time of the event that generated the packet. TSC packets are generated by events such as packet generation enable and sleep state wake. TSC packets do not precisely indicate the time of any control flow packets; however, all preceding packets represent instructions that executed before the indicated TSC time, and all subsequent packets represent instructions that executed after the TSC time. There is not a precise IP to which to bind the TSC packet. The value of a TSC packet is the current TSC value as returned by theRDTSCinstruction.You can enable TSC packets by passing the option/tscto the!enabletimestampscommand.
- Mini Time Counter (MTC) packets provide a periodic indication of the wall-clock time. This allows the decoder to keep track of how much wall-clock time has elapsed since the last TSC packet was sent, by keeping track of how many MTC packets were sent and what their value was. As their payload, MTC packets contain the Common Timestamp Copy (CTC). The CTC is an 8-bit range taken from the value of the core crystal clock, starting from theN-th bit. Intel PT sends an MTC packet every time the value of CTC changes; therefore, the value ofNcontrols the frequency of MTC packets.You can enable MTC packets by passing the option/mtcto the!enabletimestampscommand. Additionally, you can pass the option/mtcfreqto specify the frequency of the MTC packets. The frequency valueNNmeans that an MTC packet is sent every time bitNof the core crystal clock changes. The value 0 means that Intel PT sends an MTC packet every tick of the core crystal clock.
- Cycle Count (CYC) packets provide the number of core clocks that have passed since the last CYC packet. CYC can be configured to be sent in every cycle in which an eligible packet is generated, or software can opt to use a threshold to limit the number of CYC packets. A CYC packet precedes other packets generated in the same cycle and provides the precise cycle time of the packets that follow.You can enable CYC packets by passing the option/cycto the!enabletimestampscommand. Additionally, you can pass the option/cycthresto specify the threshold for CYC packet generation. The threshold valueTT= 0 means that no threshold is in use, and a CYC packet will be generated in any cycle in which any CYC-eligible packet is generated. A threshold valueT> 0 means that CYC packets are generated only after at leastTcycles have passed since the last CYC packet.
Choosing Your Timestamp Packet Configuration
- Enabling only Time Stamp Counter (TSC) packets means that you do not have a precise indication of instruction trace timing.
- Enabling Mini Time Counter (MTC) and Cycle Count (CYC) packets, but not TSC packets, gives you timing data relative to 0. Enabling TSC packets gives you the ability to analyze execution with other timing sources.
- Enabling MTC and CYC packets is key to getting precise timing information. Use/mtcfreq 0and/cycthres 0to get the maximum level of precision.
- The decoder uses the combination of MTC and CYC packets to track instruction execution time. Increase the MTC frequency and decrease the CYC threshold to find the best combination to fit your needs. Consider the following:
- MTC packets are periodic and based on the core crystal clock. Using the maximum frequency value/mtcfreq 0allows the decoder to identify the timing of small sequences of instructions. Reducing the frequency reduces accuracy.
- CYC packets rely on the processor core clock, which can experience delays depending on the P-State and thermal conditions. Increasing the threshold for CYC packets reduces the number of CYC packets stored in the Intel PT buffer at the cost of reduced accuracy.
Disabling Timestamp Packets in Intel® PT
!disabletimestamps [/here] /here - Disable on the currently selected processor only Disable timestamps