• 11/18/2019
  • Public Content

Choose Problem

Intel® Inspector
is a dynamic memory and threading error checking tool for users developing serial and multithreaded applications on Windows* and Linux* operating systems. This topic is part of a
that shows how to find and fix
errors using the
Intel Inspector
and a
sample application.

Understand Key Terms

code location
: A fact the
Intel Inspector
observes at a source code location, such as a
code location. Previously called an
: One or more occurrences of a detected issue, such as an uninitialized memory access. Multiple occurrences have the same call stack but a different thread or timestamp. You can view information for a problem as well as for each occurrence.
problem set
: A group of problems with a common problem type and a shared code location that might share a common solution, such as a problem set resulting from deallocating an object too early during application execution. You can view problem sets only after analysis is complete.
See the Intel® Inspector Glossary for more key terminology.

Understand Summary Window Panes

window similar to the following automatically displays after analysis completes successfully.
Summary window
window is the starting point for managing result data. It groups problems into problem sets and then prioritizes the problem sets by severity and size.
Think of the
pane as a
list. Start at the top and work your way down. Try viewing the problems in various problem sets by clicking the corresponding by clicking the corresponding Expand control 
Code Locations
pane shows the code location summary, surrounding source code snippet, and call stack information for all code locations in one or all occurrences of the problem(s) highlighted in the
Try using the various controls on the slider to view information for different occurrences of the highlighted problem.

Choose a Problem

When you are finished experimenting, double-click the data row for the
Mismatched allocation/deallocation
problem set
in the
source file
to display the
window, which provides more visibility into the cause of the error.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804