User Guide

  • 2020
  • 10/21/2020
  • Public Content
Contents

Cross-thread Stack Access

Occurs when a thread accesses a different thread's stack.
ID
Code Location
Description
1
Allocation site
If present, represents the location and associated call stack where the accessed stack memory was allocated.
2
Stack owned
Represents the location and associated call stack where the thread owning the stack was created.
3
Stack cross access
Represents the location and associated call stack where the stack memory was accessed by a different thread.
It is unsafe if the two threads do not coordinate the access properly. This can happen even if the accesses do not have race conditions. Failure to coordinate safe accesses can potentially result in unexpected application behavior or even an application crash. However, the
Intel Inspector
does not distinguish between safe accesses and unsafe accesses. It is the user's responsibility to determine if a cross-thread stack access is safe or not.
Preparation
int *p; CreateThread(..., thread #1, ...); CreateThread(..., thread #2, ...);
Thread #1
int q[1024]; // Allocated on Thread #1's stack p = q; q[0] = 1;
Thread #2
*p = 2; // Thread #1's stack accessed
If thread #1 and thread #2 are concurrent and there is no other synchronization between them, the
Intel Inspector
detects a
Cross-thread stack access
problem if
p = q;
in thread #1 executes before
*p = 2;
executes in thread #2.
The example shows the case where thread #1 publishes the address of a local stack variable
q
to the global pointer
p
, and later thread #2 accesses the stack of thread #1 by dereferencing the global pointer
p
, in effect writing to the variable
q
on thread #1.
Possible Correction Strategies
  • Keep stack variables private to each thread.
  • Avoid publishing addresses of stack variables and storing shared data on thread's stack. Instead, store shared data on the heap or in static variables.
  • If you cannot avoid accessing a different thread's stack, establish a handshaking protocol between the owning thread and accessing thread to prevent accidental corruption or the reading of unexpected or garbage stack data.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804