User Guide

  • 2020
  • 05/04/2020
  • Public Content
Contents

Suppression Rule Examples in the GUI

  • Although you are ultimately trying to suppress problems, the
    Intel Inspector
    vehicle
    for defining a suppression rule is one or more code locations.
  • Narrow rules suppress a limited number of relevant problems; wider rules suppress a greater number of relevant problems.
  • Every rule applied during analysis adds processing time.
  • The goal: Suppress the greatest number of relevant problems with the fewest number of rules.
  • To review rules to be applied during analysis, check the
    Suppressions
    tab of the
    Project Properties
    dialog box.
  • To apply rules during analysis, select the
    Apply Suppressions
    radio button on the
    Target
    tab of the
    Project Properties
    dialog box.
  • A code location may be part of multiple problems; therefore, multiple rules may suppress the same code location, or a rule created to suppress one problem may partially impact another problem.

Suppression Rule Example 1

Suppression rule Example1 suppresses any
Data race
problem between
Read
and
Write
code locations with the following characteristics as the last-called frame in the stack:
find_and_fix_threading_errors.exe
module,
render_one_pixel
function, and
find_and_fix_threading_errors.cpp
source file.

Suppression Rule Example 2

Suppression rule Example2 suppresses any problem with an
Allocation site
code location whose last-called frame in the stack is in the
find_and_fix_memory_errors.exe
module.

Suppression Rule Example 3

Suppression rule Example3 suppresses any problem where the last-called frame in the stack is in the
operator()
function of the
find_and_fix_memory_errors.exe
module and the end of the stack path is
execute
calling
operator()
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804