• 07/14/2017
  • Public Content
Contents

Imaging Specifications

Overview
The Imaging Processing Unit (IPU) consists of the Processing Subsystem (PS) and the Input Subsystem (IS). The Processing Subsystem is an advanced Image Signal processor (ISP). The Input Subsystem contains the MIPI CSI2 controllers. The IPU interfaces with the CMOS image sensors in the camera module through the IS and processes still and video frames in the PS.
Number of Cameras Supported
  • The IPU can support a maximum of four cameras
  • Typical expected usage is one primary camera and one secondary camera
  • Allocating four cameras between world and user-facing views is ultimately at the designer’s discretion
Simultaneous Acquisition
  • All cameras can be active at the same time
  • The IS saves streams to memory for off line processing and for one primary camera
  • On-the-fly processing is also supported

Product and Performance Information

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Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.