• 07/14/2017
  • Public Content
Contents

MIPI* CSI signal group specifications

JCAM1 and JCAM2 connector interface signals
Supported configuration is a 13 mega-pixel cameral module on JCAM1 and a 5 mega-pixel camera module on JCAM2. The pin-out is the same for each connector.
Connector pin
Signal Name
Usage
Description
Note
21
CAM_CLK
Output
Camera master clock, programmable frequency
8
26
CSI_CLK_0_DN
Input
MIPI CSI Clock 0
3
24
CSI_CLK_0_DP
Input
MIPI CSI Clock 0
3
18
CSI_CLK_2_DN
Input
MIPI CSI Clock 2
4
16
CSI_CLK_2_DP
Input
MIPI CSI Clock 2
4
38
CSI_D0_DN
Input
MIPI CSI Data 0
 
36
CSI_D0_DP
Input
MIPI CSI Data 0
 
32
CSI_D1_DN
Input
MIPI CSI Data 1
 
30
CSI_D1_DP
Input
MIPI CSI Data 1
 
6
CSI_D2_DN
Input
MIPI CSI Data 2
5
4
CSI_D2_DP
Input
MIPI CSI Data 2
5
12
CSI_D3_DN
Input
MIPI CSI Data 3
5
10
CSI_D3_DP
Input
MIPI CSI Data 3
5
7
I2C_SCL
Output
I2C clock
7
5
I2C_SDA
Input/Output
I2C data
7
29
RESET1_N
Output
First camera reset, active low
 
11
RESET2_N
Output
Second camera reset, active low
 
9
SID
Output
Second camera I2C ID
2
1
VCAM_A
Supply
Camera analog supply
6
13
VCAM_AF
Supply
Camera autofocus supply
6
31, 33
VCAM_DIG
Supply
Camera digital supply
6
37
VCAM_IO
Supply
Camera I/O supply
1, 6
17, 23
VDD3
Supply
VDD3 supply
 
27
XSDW
Output
Camera(s) shutdown, active low
 
Notes:
  1. VCAM_IO is shared between JCAM1 and JCAM2
  2. SID is used for setting I2C slave address on the second sensor in a two camera configuration
  3. For a single camera configuration, lanes D0-D3 are paired with CLK0
  4. For two camera configuration, lanes D0-D1 are paired with CLK0 and lanes D2-D3 are paired with CLK_2
  5. Lanes D2 and D3 are optional and may not be needed if using a single low resolution camera
  6. Voltage rails are programmable and can be configured in the BIOS. However, the module design must be able to withstand voltages described in MIPI* CSI DC Specification . Appropriate decoupling capacitors are required on the camera module side.
  7. I2C signals require a 2.7k ohm pull-up to 1.8V, either externally or using the SoC internal pull-ups.
  8. For two camera configuration, CAM_CLK is shared between both cameras

Product and Performance Information

1

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Notice revision #20110804