• 07/14/2017
  • Public Content
Contents

Clock Signal Termination and Conditioning

Signal Name
Pullup Voltage
R
min
(Ω)
CLOAD (pF)
T
rise
(ns)
T
fall
(ns)
CLK_19P2M_LS
1.8
1200
10
16
15
CODEC_MCLK_LS
1.8
1200
10
16
15
PMIC_SLPCLK_1_LS
3.3
1100
47
54
20
 
Example Using CLK_19P2M_LS Signal
The following diagram shows how to use the information in the table to position a pullup resistor for the signal CLK_19P2M_LS. For information about how the values in the table were measured refer to Termination and Conditioning.

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.