• 07/14/2017
  • Public Content
Contents

GPIO Signal Termination and Conditioning

GPIO signal level translation termination recommendations
Signal Name
Pullup Voltage
R
min
(Ω)
CLOAD (pF)
T
rise
(ns)
T
fall
(ns)
FLASH_RST_N_LS
3.3
2200
47
138
35
FLASH_TORCH_LS
FLASH_TRIGGER_LS
GPIO_22_LS
3.3
2400
47
100
7.4
ISH_GPIO_0_LS
3.3
2200
47
162
35
ISH_GPIO_1_LS
ISH_GPIO_2_LS
ISH_GPIO_3_LS
ISH_GPIO_4_LS
ISH_GPIO_5_LS
ISH_GPIO_6_LS
ISH_UART_0_CTS_LS
3.3
2200
47
140
35
ISH_UART_0_RTS_LS
ISH_UART_0_RXD_LS
ISH_UART_0_TXD_LS
ISH_UART_0_RTS_LS
Example Using GPIO Signal
The following diagram shows how to use the information in the table to position a pullup resistor for a GPIO signal For information about how the values in the table were measured refer to Terminaltion and Conditioning.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804