• 07/14/2017
  • Public Content
Contents

Termination and Conditioning

You must terminate a signal so that the line doesn’t float. For example, when data lines transitions from logic low to logic high, the level shifter opens similar to an open switch. The pullup resistor pulls the voltage up to logic high so that the signal can continue. Tables throughout this document provide the size of the pullup resistor you need for each signal.
The following diagram shows how the values in the tables were measured and what each value means, and an example table.
Example Table
Signal Name
Pullup Voltage
R
min
(Ω)
CLOAD (pF)
T
rise
(ns)
T
fall
(ns)
PMIC_PWRGOOD_LS
3.3
2200
47
36800
19
 
The values in the table present the rise and fall times for a particular capacitive loading. You need to calculate the maximum frequency and values for Vol, Voh, Vil, Vih, Iol, Ioh based on the capacitive loading of your particular design.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804