• 07/14/2017
  • Public Content
Contents

Audio Interface

Audio Codec
The I2S_1 port on J6 is available for audio playback and recording, for example through an audio codec. It can operate in I2S and PCM master or slave modes. The signals are shown below.
Signal
Module Connector.Pin
Pin Direction
Use
I2S_1_CLK
J6.39
Input/Output
I2S bit clock, supplied by the module in master mode and serves as an input in slave mode
I2S_1_FS
J6.45
Input/Output
I2S frame sync, supplied by the module in master mode and serves as an input in slave mode
I2S_1_RXD
J6.47
Output
I2S receive data
I2S_1_TXD
J6.49
Input
I2S transmit data
 
In addition to the audio data over the I2S lines, the Intel® Joule™ module can provide the clock signal for the audio codec over CODEC_MCLK (connector J6 pin 43).
The control interface to the audio codec is connected through the I2C or SPI and a possible interrupt line for headset detection from the codec to the module through a standard interrupt capable GPIO (see figure below).
Refer to I2S Interface Specifications for additional electrical specifications.
 
 
Digital Microphones
Two digital microphones can be connected to the clock and data signals AVS_M_CLK_A1/AVS_M_CLK_B1 and AVS_M_DATA_1, on connector J7 (pins 52/62 and 66). For a two microphone configuration, using a separate clock signal allows a single microphone to run if a lower power state is needed. Use of the second clock signal is not required.

Product and Performance Information

1

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Notice revision #20110804