• 07/14/2017
  • Public Content
Contents

SPI Serial Peripheral Interface

A 25-MHz SPI bus (SPI_1) is available on the J6 connector with three slave selects and another 25-MHz SPI bus (SPI_0) with two slave selects on the J7 connector. The bus speed is 25 MHz in master mode and 16.67 MHz in slave mode.
In a single-frame transfer, the SoC supports all four possible combinations for the serial clock phase and polarity. In multiple frame transfer, the Intel® Joule™ module supports only a clock phase setting of 1.
SPI bus usage example
Note: The SPI interfaces operate 1.8 VDC levels.
Signal
Module Connector.Pin
Pin Direction
Use
SPI_0_CLK
J7.59
Input
SPI 0 clock
SPI_0_MOSI
J7.57
Input
SPI 0 master out/slave in
SPI_0_MISO
J7.59
Output
SPI 0 master in/slave out
SPI_0_FS0
J7.77
Input
SPI 0 slave select 0
SPI_0_FS1
J7.79
Input
SPI 0 slave select 1
SPI_0_FS2
J7.53
Input
SPI 0 slave select 2
SPI_1_CLK
J6.53
Input
SPI 1 clock
SPI_1_MOSI
J6.51
Input
SPI 1 master out/slave in
SPI_1_MISO
 
J6.63
Output
SPI 1 master in/slave out
SPI_1_FS0
J6.55
Input
SPI 1 slave select 0
SPI_1_FS2
J6.14
Input
SPI 1 slave select 1
Note: Refer to Serial Peripheral Interface Specifications for additional electrical specifications.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804