• 07/14/2017
  • Public Content
Contents

Differential Trace Information

Differential signal pairs need to be routed in parallel with a specific, constant distance. Differential pair signals need to be routed symmetrically. It is not permitted to place any components or vias between the differential pairs, even if the signals are routed symmetrically. Any vias needed on the signal path itself need to be placed in pairs and symmetrically. All traces of a signal and all signals as a whole must be length matched to eliminate skew. It is strongly recommended to route the clock and data lanes on the same layer, between ground and power planes.
 
I/O
Zo (Ohm)
 
±
 
12%
Max. Routing Length
(mils)
Min. Ratio Intra-Pair Space
Intra-Pair Mismatch Limit
Min. Ratio Inter-Pair Space
Note
HDMI
80-85
4200
1:1
+/- 5 mil
4:1
 
USB 3.0
80-85
5900
1:1
+/- 10 mil
4:1
1
USB 2.0 OTG
80-85
9900
1:1
+/- 20 mil
4:1
1
Note:
Spacing to adjacent interfaces to follow Min. Ratio Inter-Pair Spacing.
USB maximum length is for OTG detection topology without FPC.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804