• 07/14/2017
  • Public Content

BIOS Update and Configuration

This section provides an overview of services provided by the BIOS and an outline of the steps to update the BIOS firmware contained within the module memory.
Additionally, there is some limited information for making configuration choices within the BIOS menu system. Be aware that the BIOS menu options and menu system structure can change between builds, and that the information provided here may not reflect the current version on your system.
BIOS Overview and Sequence
The compute module stores the BIOS firmware in a protected block of the eMMC storage device. The BIOS code is executed after the platform power-on is successfully completed, this is indicated by the PWR_GOOD signal. See Power On Timing Sequence (cold boot) for more information.
The following outline is abstracted to highlight key events and does not detail all actions performed by the BIOS.
  • BIOS begins sending status messages on the serial debug port
  • BIOS attempts to initialize any connected display devices; displaying version information to the user
  • BIOS prompts user to enter the BIOS setup menu system or change boot device
  • BIOS queries any attached configuration EEPROM device to load additional configuration data.
Note: The EEPROM device is discussed in the Configuration EEPROM . At this time there is not a user accessible way to modify the EEPROM data.
BIOS Menu System
Depressing [F2] during the first few seconds of BIOS execution will allow the operator to enter the BIOS configuration system. This menu based environment is navigated by keyboard commands. While the exact layout will vary per build, top level entry points and items of specific interest to developers are listed below:
See the BIOS release notes for additional information . It is located in the Docs folder inside the zipped file you download.
Note: If any changes are made, they need to be committed to module memory and a reboot is required for the new settings to take effect.

Product and Performance Information


Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804