Developer Reference


Developer Reference for Intel® Integrated Performance Primitives Cryptography

The Intel® Integrated Performance Primitives (Intel® IPP) is a software library that provides a comprehensive set of application domain-specific highly optimized functions for signal and image processing and cryptography.
This publication, the
Developer Reference for Intel Integrated Performance Primitives Cryptography
, was previously known as the
Cryptography for Intel Integrated Performance Primitives Reference Manual
Intel IPP Cryptography is an add-on library that offers Intel IPP users a cross-platform and cross operating system application programming interface (API) for routines commonly used for cryptographic operations. Among other features, the library includes:

RSA Algorithm Functions

RSA Algorithm Functions implement the non-symmetric RSA algorithm. Subsections include reference for different encryption schemes and RSA system building functions.

Rijndael Functions

Rijndael Functions implement the symmetric iterated Rijndael block cipher with variable key and block sizes. The Rijndael cipher with 128 bit block size is also known as the Advanced Encryption Standard (AES) cipher.

Mask Generation Functions

A Mask Generation Function takes a string of arbitrary length and deterministically outputs a pseudorandom string of desired length. Mask Generation Functions are used in different cryptographic algorithms, including some RSA encryption schemes.

AES-CCM Functions

AES-CCM Functions are an implementation of the Counter with Cipher Block Chaining-Message Authentication Code (CCM) mode of operation of the AES cipher.

AES-GCM Functions

AES-GCM Functions implement the Galois/Counter Mode (GCM) of operation of the AES block cipher. GCM is an authenticated encryption algorithm, which allows you to verify the integrity of encrypted data.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804

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