Developer Reference

Contents

PrimeGen

Generates a random probable prime number of the specified bitlength.

Syntax

IppStatus ippsPrimeGen(int
nBits
, int
nTrials
, IppsPrimeState*
pCtx
, IppBitSupplier rndFunc, void*
pRndParam
);
Include Files
ippcp.h
Parameters
nBits
Target bitlength for the desired probable prime number.
nTrials
Security parameter specified for the Miller-Rabin probable primality.
pCtx
Pointer to the
IppsPrimeState
context.
rndFunc
Specified Random Generator.
pRndParam
Pointer to the Random Generator context.
Description
The function employs the
rndFuncRandom
Generator specified by the user to generate a random probable prime number of the specified
nBits
length. The generated probable prime number is further validated by the Miller-Rabin primality test scheme with the specified security parameter
nTrials
.
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or warning.
ippStsNullPtrErr
Indicates an error condition if any of the specified pointers is
NULL
.
ippStsLengthErr
Indicates an error condition if
nBits
is less than 1.
ippStsContextMatchErr
Indicates an error condition if the context parameter does not match the operation.
ippStsBadArgErr
Indicates an error condition if
nTrials
is less than 1.
ippStsOutOfRangeErr
Indicates an error condition if
nBits
>
nMaxBits
(see
PrimeGetSize
and
PrimeInit
)
ippStsInsufficientEntropy
Indicates a warning condition if prime generation fails due to poor choice of entropy.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804