Developer Reference

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AES_XTSEncrypt

Encrypts a data buffer in the XTS mode.

Syntax

IppStatus ippsAES_XTSEncrypt(const Ipp8u*
pSrc
, Ipp8u*
pDst
, int
bitSizeLen
, const IppsAES_XTSSpec*
pCtx
, const Ipp8u*
pTweak
, int
startCipherBlkNo
);
Include Files
ippcp.h
Parameters
pSrc
Pointer to the input plaintext data stream of variable length.
pDst
Pointer to the resulting ciphertext data stream.
bitSizeLen
Length of the input buffer in bits.
pCtx
Pointer to the
IppsAES_XTSSpec
context.
pTweak
Pointer to the tweak vector assigned to the data unit being encrypted.
startCipherBlkNo
Number of the first block of the data unit.
Description
The function encrypts the input data stream of a variable length in the XTS mode as specified in [IEEE P1619] and [NIST SP 800-38E].
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or warning.
ippStsNullPtrErr
Indicates an error condition if any of the specified pointers is
NULL
.
ippStsLengthErr
Indicates an error condition if the
bitSizeLen
parameter value is less than 128.
ippStsBadArgErr
Indicates an error condition in the following cases:
  • startCipherBlkNo
    value is less than zero.
  • startCipherBlkNo
    value is greater than or equal to the number of the data unit blocks.
  • startCipherBlkNo
    ×128+
    bitSizeLen
    value is greater than size of the data unit in bits.
  • size of the data unit in bits modulo 128 is zero and the
    bitSizeLen
    value modulo 128 is not zero.
  • bitSizeLen
    value modulo 128 is zero and
    startCipherBlkNo
    ×128+
    bitSizeLen
    value is not equal to size of the data unit in bits.
ippStsContextMatchErr
Indicates an error condition if the context parameter does not match the operation.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804