Developer Reference

Contents

TDESEncryptECB

Encrypts variable length data stream in ECB mode (deprecated).

Syntax

IppStatus ippsTDESEncryptECB(const Ipp8u *
pSrc
, Ipp8u *
pDst
, int
length
, const IppsDESSpec *
pCtx1
, const IppsDESSpec *
pCtx2,
const IppsDESSpec *
pCtx3,
IppsCPPadding
padding
);
Include Files
ippcp.h
Parameters
pSrc
Input plaintext data stream of a variable length.
pDst
Resulting ciphertext data stream.
length
Input data stream length in bytes.
pCtx1
First set of round keys scheduled for TDES internal operations.
pCtx2
Second set of round keys scheduled for TDES internal operations.
pCtx3
Third set of round keys scheduled for TDES internal operations.
padding
IppsPaddingNONE
padding scheme.
Description
This algorithm is considered weak due to known attacks on it. The functionality remains in the library, but the implementation will no longer be optimized and no security patches will be applied. A more secure alternative is available: AES.
This function encrypts the input data stream of a variable length according to the cipher scheme specified in [NIST SP 800-38A]. The function uses three sets of supplied round keys in the ECB mode. The function returns the ciphertext result.
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or warning.
ippStsNullPtrErr
Indicates an error condition if any of the specified pointers is
NULL
.
ippStsLengthErr
Indicates an error condition if the input data stream length is less than or equal to zero.
ippStsUnderRunErr
Indicates an error condition if the input data stream length is not divisible by cipher block size.
ippStsContextMatchErr
Indicates an error condition if the context parameter does not match the operation.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804