Developer Guide

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Using Intel® Integrated Performance Primitives Threading Layer (TL) Functions

Intel® Integrated Performance Primitives (Intel® IPP) library provides threading layer (TL) functions for image processing. Intel IPP TL functions are visual examples of external threading for Intel IPP functions. Taking advantage of multithreaded execution and tile processing, Intel IPP TL functions enable you to overcome 32-bit size limitations.
TL functions are provided as:
  • Pre-built binaries:
    header and library files have the
    _tl
    suffix and can be found in:
    • Header files:
      <
      ipp directory
      >/include
    • Library files:
      <
      ipp directory
      >/lib/<
      arch
      >/tl/<
      threading_type
      >
      , where
      threading_type
      is one of
      {tbb, openmp}
      .
  • Source code samples:
    the source code and corresponding header files are available in the
    components_and_examples_<
    os
    >.zip
    archive inside the
    <
    ipp directory
    >/components
    subdirectory. For more information about the archive contents and source code building instructions, refer to Finding Intel® IPP TL Source Code Files and Building Intel® IPP TL Libraries from Source Code, respectively.
The API of TL functions is similar to the API of other Intel IPP functions and has only slight differences. You can distinguish Intel IPP TL functions by the
_LT
or
_T
suffix in the function name, for example,
ippiAdd_8u_C1RSfs_LT
. Intel IPP TL functions are implemented as wrappers over Intel IPP functions by using tiling and multithreading with OpenMP* or the Intel® Threading Building Blocks. For implementation details, please see the corresponding source code files.
To use the Intel® IPP TL library on macOS*, you need to link your application with the Intel® OpenMP*
libiomp5
library, which is available at
<
install_dir
>/lib
.
Optimization Notice
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.
Notice revision #20110804

Product and Performance Information

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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804