Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

Appendix A:
Handling of Special Cases

Some mathematical functions implemented in Intel IPP are not defined for all possible argument values. This appendix describes how the corresponding Intel IPP functions used in signal processing domains handle situations when their input arguments fall outside the range of function definition or may lead to ambiguously determined output results.
The table
"Special Cases for Intel IPP Signal Processing Functions"
below summarizes these special cases for general vector functions described in Essential Functions and lists result values together with status codes returned by these functions. The status codes ending with
Err
(except for the
ippStsNoErr
status) indicate an error. When an error occurs, the function execution is interrupted. All other status codes indicate that the input argument is outside the range, but the function execution is continued with the corresponding result value.
Special Cases for Intel IPP Signal Processing Functions
Function Base Name
Data Type
Case Description
Result Value
Status Code
16s
32f
64s
64f
Sqrt (x<0)
Sqrt (x<0)
Sqrt (x<0)
Sqrt (x<0)
0
NAN_32F
0
NAN_64F
ippStsSqrtNegArg
ippStsSqrtNegArg
ippStsSqrtNegArg
ippStsSqrtNegArg
8u
 
 
16s
 
 
 
16sc
 
 
32f
 
 
 
32fc
 
 
64f
 
 
 
64fc
 
Div (0/0)
Div (x/0)
 
Div (0/0)
Div (x/0), x>0
Div (x/0), x<0
 
Div (0/0)
Div (x/0)
 
Div (0/0)
Div (x/0), x>0
Div (x/0), x<0
 
Div (0/0)
Div (x/0)
 
Div (0/0)
Div (x/0), x>0
Div (x/0), x<0
 
Div (0/0)
Div (x/0)
0
IPP_MAX_8U
 
0
IPP_MAX_16S
IPP_MIN_16S
 
0
0
 
NAN_32F
INF_32F
INF_NEG_32F
 
NAN_32F
NAN_32F
 
NAN_32F
INF_32F
INF_NEG_32F
 
NAN_32F
NAN_32F
ippStsDivByZero
ippStsDivByZero
 
ippStsDivByZero
ippStsDivByZero
ippStsDivByZero
 
ippStsDivByZero
ippStsDivByZero
 
ippStsDivByZero
ippStsDivByZero
ippStsDivByZero
 
ippStsDivByZero
ippStsDivByZero
 
ippStsDivByZero
ippStsDivByZero
ippStsDivByZero
 
ippStsDivByZero
ippStsDivByZero
all
Div(x/0)
-
ippStsDivByZeroErr
16s
 
 
32s
 
 
32f
 
 
64f
 
Ln (0)
Ln (x<0)
 
Ln (0)
Ln (x<0)
 
Ln (x<0)
Ln(x<IPP_MINABS_32F)
 
Ln (x<0)
Ln(x<IPP_MINABS_64F)
IPP_MIN_16S
IPP_MIN_16S
 
IPP_MIN_32S
IPP_MIN_32S
 
NAN_32F
INF_NEG_32F
 
NAN_64F
INF_NEG_64F
ippStsLnZeroArg
ippStsLnZeroArg
   
ippStsLnZeroArg
ippStsLnNegArg
 
ippStsLnNegArg
ippStsLnZeroArg
 
ippStsLnNegArg
ippStsLnZeroArg
16s
 
32s
 
64s
 
32f
 
64f
overflow
 
overflow
 
overflow
 
overflow
 
overflow
IPP_MAX_16S
 
IPP_MAX_32S
 
IPP_MAX_64S
 
INF_32F
 
INF_64F
ippStsNoErr
 
ippStsNoErr
 
ippStsNoErr
 
ippStsNoErr
 
ippStsNoErr
Here
x
denotes an input value. For the definition of the constants used, see Data Ranges in
Intel® Integrated Performance Primitives Concepts
.
Note that flavors of the same math function operating on different data types may produce different results for equal argument values. However, for a given function and a fixed data type, handling of special cases is the same for all function flavors that have different descriptors in their names. For example, the logarithm function
ippiLn
operating on
16s
data treats zero argument values in the same way for all its flavors
ippsLn_16s_Sfs
and
ippiLn_16s_ISfs
.
The table below summarizes special cases for fixed-accuracy arithmetic functions.
Special Cases for Intel IPP Fixed-Accuracy Arithmetic Functions
Function Base Name
Data Type
Case Description
Result Value
Status Code
32f
 
64f
 
Inv (x=+0)
Inv (x=-0)
Inv (x=+0)
Inv (x=-0)
INF_32F
-INF_32F
INF_64F
-INF_64F
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
32f
 
 
 
 
64f
 
 
 
 
Div (x>0, y=+0)
Div (x>0, y=-0)
Div (x<0, y=+0)
Div (x<0, y=-0)
Div (x=0, y=0)
Div (x>0, y=+0)
Div (x>0, y=-0)
Div (x<0, y=+0)
Div (x<0, y=-0)
Div (x=0, y=0)
INF_32F
-INF_32F
INF_32F
-INF_32F
NAN_32F
INF_64F
-INF_64F
INF_64F
-INF_64F
NAN_64F
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
32f
 
64f
 
Sqrt(x<0)
Sqrt(x=-INF)
Sqrt(x<0)
Sqrt(x=-INF)
NAN_32F
NAN_32F
NAN_64F
NAN_64F
ippStsDomain
ippStsDomain
ippStsDomain
ippStsDomain
32f
 
 
 
64f
 
 
 
InvSqrt (x<0)
InvSqrt (x=+0)
InvSqrt (x=-0)
InvSqrt (x=-INF)
InvSqrt (x<0)
InvSqrt (x=+0)
InvSqrt (x=-0)
InvSqrt (x=-INF)
NAN_32F
INF_32F
-INF_32F
NAN_32F
NAN_64F
INF_64F
-INF_64F
NAN_64F
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsDomain
32f
 
64f
 
InvCbrt (x=+0)
InvCbrt (x=-0)
InvCbrt (x=+0)
InvCbrt (x=-0)
INF_32F
-INF_32F
INF_64F
-INF_64F
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
32f
 
64f
 
Pow3o2 (x<0)
Pow3o2 (x=-INF)
Pow3o2 (x<0)
Pow3o2 (x=-INF)
NAN_32F
NAN_32F
NAN_64F
NAN_64F
ippStsDomain
ippStsDomain
ippStsDomain
ippStsDomain
32f
 
 
 
 
 
64f
 
 
 
 
 
Pow (x=+0, y=-ODD_INT)
Pow (x=-0, y=-ODD_INT)
Pow (x=0, y=-EVEN_INT)
Pow (x=0, y=NON_INT_NEG)
Pow (x<0, y=NON_INT_POS)
Pow (x=0, y=-INF)
Pow (x=+0, y=-ODD_INT)
Pow (x=-0, y=-ODD_INT)
Pow (x=0, y=-EVEN_INT)
Pow (x=0, y=NON_INT_NEG)
Pow (x<0, y=NON_INT_POS)
Pow (x=0, y=-INF)
INF_32F
-INF_32F
INF_32F
INF_32F
NAN_32F
INF_32F
INF_64F
-INF_64F
INF_64F
INF_64F
NAN_64F
INF_64F
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsSingularity
32f
 
64f
 
Exp (x), x<underflow
Exp (x), x>overflow
Exp (x), x<underflow
Exp (x), x>overflow
0
INF_32F
0
INF_64F
ippStsUnderflow
ippStsOverflow
ippStsUnderflow
ippStsOverflow
32f
64f
Expm1(x), x>overflow
Expm1(x), x>overflow
INF_32F
INF_64F
ippStsOverflow
ippStsOverflow
32f
 
 
64f
 
 
Ln(x<0)
Ln(x=-INF)
Ln(x=0)
Ln(x<0)
Ln(x=-INF)
Ln(x=0)
NAN_32F
NAN_32F
-INF_32F
NAN_64F
NAN_64F
-INF_64F
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsSingularity
32f
 
 
64f
 
 
Ln(x<-1)
Ln(x=-INF)
Ln(x=-1)
Ln(x<-1)
Ln(x=-INF)
Ln(x=-1)
NAN_32F
NAN_32F
-INF_32F
NAN_64F
NAN_64F
-INF_64F
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsSingularity
32f
64f
Cos(INF)
Cos(INF)
NAN_32F
NAN_64F
ippStsDomain
ippStsDomain
32f
64f
Sin(INF)
Sin(INF)
NAN_32F
NAN_64F
ippStsDomain
ippStsDomain
32f
64f
SinCos(INF)
SinCos(INF)
NAN_32F
,
NAN_32F
NAN_64F
,
NAN_64F
ippStsDomain
ippStsDomain
32fc
64fc
CIS(INF)
CIS(INF)
NAN_32F
,
NAN_32F
NAN_64F
,
NAN_64F
ippStsDomain
ippStsDomain
32f
64f
Tan(INF)
Tan(INF)
NAN_32F
NAN_64F
ippStsDomain
ippStsDomain
32f
 
64f
 
Acos(x), |x|>1
Acos(INF)
Acos(x), |x|>1
Acos(INF)
NAN_32F
NAN_32F
NAN_64F
NAN_64F
ippStsDomain
ippStsDomain
ippStsDomain
ippStsDomain
32f
 
64f
 
Asin(x), |x|>1
Asin(INF)
Asin(x), |x|>1
Asin(INF)
NAN_32F
NAN_32F
NAN_64F
NAN_64F
ippStsDomain
ippStsDomain
ippStsDomain
ippStsDomain
32f
64f
Cosh(x), |x|>overflow
Cosh(x), |x|>overflow
INF_32F
INF_64F
ippStsOverflow
ippStsOverflow
32f
64f
Sinh(x), |x|>overflow
Sinh(x), |x|>overflow
INF_32F
INF_64F
ippStsOverflow
ippStsOverflow
32f
 
64f
 
Acosh(x<1)
Acosh(x=-INF)
Acosh(x<1)
Acosh(x=-INF)
NAN_32F
NAN_32F
NAN_64F
NAN_64F
ippStsDomain
ippStsDomain
ippStsDomain
ippStsDomain
32f
 
 
 
64f
 
 
 
Atanh(x=1)
Atanh(x=-1)
Atanh(x), |x|>1
Atanh(INF)
Atanh(x=1)
Atanh(x=-1)
Atanh(x), |x|>1
Atanh(INF)
INF_32F
-INF_32F
NAN_32F
NAN_32F
INF_64F
-INF_64F
NAN_64F
NAN_64F
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
32f
64f
Erfc(x), |x|>underflow
Erfc(x), |x|>underflow
0
0
ippStsUnderflow
ippStsUnderflow
32f
 
 
 
64f
 
 
 
ErfInv(x=1)
ErfInv(x=-1)
ErfInv(x), |x|>1
ErfInv(INF)
ErfInv(x=1)
ErfInv(x=-1)
ErfInv(x), |x|>1
ErfInv(INF)
INF_32F
-INF_32F
NAN_32F
NAN_32F
INF_64F
-INF_64F
NAN_64F
NAN_64F
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
32f
 
 
 
 
64f
 
 
 
 
ErfcInv(x=2)
ErfcInv(x=0)
ErfcInv(x), |x|<0
ErfcInv(x), |x|>2
ErfcInv(INF)
ErfcInv(x=2)
ErfcInv(x=0)
ErfcInv(x), |x|<0
ErfcInv(x), |x|>2
ErfcInv(INF)
-INF_32F
INF_32F
NAN_32F
NAN_32F
NAN_32F
-INF_64F
INF_64F
NAN_64F
NAN_64F
NAN_64F
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsDomain
32f
64f
CdfNorm(x), |x|<underflow
CdfNorm(x), |x|<underflow
0
0
ippStsUnderflow
ippStsUnderflow
32f
 
 
 
 
64f
 
 
 
 
CdfNormInv(x=1)
CdfNormInv(x=0)
CdfNormInv(x), x<0
CdfNormInv(x), x>1
CdfNormInv(INF)
CdfNormInv(x=1)
CdfNormInv(x=0)
CdfNormInv(x), x<0
CdfNormInv(x), x>1
CdfNormInv(INF)
INF_32F
-INF_32F
NAN_32F
NAN_32F
NAN_32F
INF_64F
-INF_64F
NAN_64F
NAN_64F
NAN_64F
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsDomain
ippStsSingularity
ippStsSingularity
ippStsDomain
ippStsDomain
ippStsDomain

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Notice revision #20110804