Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

BWTInv

Performs the inverse BWT transform.

Syntax

IppStatus ippsBWTInv_8u(const Ipp8u*
pSrc
, Ipp8u*
pDst
, int
len
, int
index
, Ipp8u*
pBWTInvBuff
);
Include Files
ippdc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
pSrc
Pointer to the source vector.
pDst
Pointer to the destination vector.
len
Number of elements in the source and destination vectors.
index
Index of first position for the inverse BWT transform.
pBWTInvBuff
Pointer to the additional buffer.
Description
This function performs the inverse BWT transform of
len
elements starting from
pIndex
element of the source vector
pSrc
and stores result in the vector
pDst
. The function uses the external buffer
pBWTInvBuff
. The size of this buffer must be computed by calling the function
ippsBWTInvGetSize
beforehand.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error if one of the specified pointers is
NULL
.
ippStsSizeErr
Indicates an error if
len
is less than or equal to 0.

Example

The code example below shows how to use the function
ippsBWTInv_8u
.
void func_BWT()
{
int wndSize = 8;
int pBWTFwdBuffSize;
int pBWTInvBuffSize;
Ipp8u pSrc[] = "baadeffg";
int len = 8;
int pIndex;
Ipp8u* pDst = ippsMalloc_8u(len);
Ipp8u* pDstInv = ippsMalloc_8u(len);
ippsBWTFwdGetSize_8u(wndSize, &pBWTFwdBuffSize);
Ipp8u* pBWTFwdBuff = ippsMalloc_8u(pBWTFwdBuffSize);
ippsBWTFwd_8u(pSrc, pDst, len, &pIndex, pBWTFwdBuff);
ippsBWTInvGetSize_8u( wndSize, &pBWTInvBuffSize);
Ipp8u* pBWTInvBuff = ippsMalloc_8u(pBWTInvBuffSize);
ippsBWTInv_8u(pDst, pDstInv, len, pIndex, pBWTInvBuff);
}
Result:
pDst -> "bagadeff"
pDstInv -> "baadeffg"

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804