Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

DecodeRLEState_BZ2

Performs the bzip2-specific RLE decoding.

Syntax

IppStatus ippsDecodeRLEState_BZ2_8u(Ipp8u**
ppSrc
, Ipp32u*
pSrcLen
, Ipp8u**
ppDst
, Ipp32u*
pDstLen
, IppRLEState_BZ2*
pRLEState
);
Include Files
ippdc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
ppSrc
Double pointer to the source buffer.
pSrcLen
Pointer to the length of the source buffer.
ppDst
Double pointer to the destination buffer.
pDstLen
Pointer to the length of the destination buffer.
pRLEState
Pointer to the bzip2-specific RLE state structure.
Description
This function performs RLE decoding with thresholding equal to 4. It processes the input data
ppSrc
and writes the results to the
ppDst
buffer. The function uses the bzip2-specific RLE state structure
pRLEState
. This structure must be initialized by the functions DecodeRLEStateInit_BZ2 beforehand.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error if one of the pointers is
NULL
.
ippStsSizeErr
Indicates an error if length of the source or destination buffer is less than or equal to 0.
ippStsDstSizeLessExpected
Indicates a warning if size of the destination buffer is insufficient to store all output elements.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804