Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

SortRadixAscend
,
SortRadixDescend

Sorts all elements of a vector using radix sorting algorithm.

Syntax

IppStatus ippsSortRadixAscend_<mod>(Ipp<datatype>*
pSrcDst
, int
len
, Ipp8u*
pBuffer
);
Supported values for
mod
:
8u_I
32u_I
64u_I
16u_I
32s_I
64s_I
16s_I
32f_I
64f_I
IppStatus ippsSortRadixDescend_<mod>(Ipp<datatype>*
pSrcDst
, int
len
, Ipp8u*
pBuffer
);
Supported values for
mod
:
8u_I
32u_I
64u_I
16u_I
32s_I
64s_I
16s_I
32f_I
64f_I
Radix Sorting Algorithm for platform-aware functions
IppStatus ippsSortRadixAscend_<mod>(Ipp<datatype>*
pSrcDst
, IppSizeL
len
, Ipp8u*
pBuffer
);
Supported values for
mod
:
64u_I_L
32s_I_L
64s_I_L
32f_I_L
64f_I_L
IppStatus ippsSortRadixDescend_<mod>(Ipp<datatype>*
pSrcDst
, IppSizeL
len
, Ipp8u*
pBuffer
);
Supported values for
mod
:
64u_I_L
32s_I_L
64s_I_L
32f_I_L
64f_I_L
Include Files
ipps.h
Flavors with the
_L
suffix:
ipps_l.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
pSrcDst
Pointer to the source and destination vector.
len
Number of elements in the vector
pBuffer
Pointer to the buffer for internal calculations. To compute the required buffer size, use the SortRadixGetBufferSize function.
Description
These functions rearrange all elements of the source vector
pSrcDst
in the ascending or descending order, respectively, using “radix sort” algorithm, and store the result in the destination vector
pSrcDst
.
Flavors with the
_L
suffix operate on larger data size.
These functions require the work buffer for internal calculations, to compute the size of the buffer, use the SortRadixGetBufferSize
or SortRadixGetBufferSize_L (for the flavors with the
_L
suffix)
function.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when
pSrcDst
or
pBuffer
is
NULL
.
ippStsSizeErr
Indicates an error when
len
is less than, or equal to 0.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804