Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

SwapBytes

Reverses the byte order of a vector.

Syntax

IppStatus ippsSwapBytes_16u(const Ipp16u*
pSrc
, Ipp16u*
pDst
, int
len
);
IppStatus ippsSwapBytes_24u(const Ipp8u*
pSrc
, Ipp8u*
pDst
, int
len
);
IppStatus ippsSwapBytes_32u(const Ipp32u*
pSrc
, Ipp32u*
pDst
, int
len
);
IppStatus ippsSwapBytes_64u(const Ipp64u*
pSrc
, Ipp64u*
pDst
, int
len
);
IppStatus ippsSwapBytes_16u_I(Ipp16u*
pSrcDst
, int
len
);
IppStatus ippsSwapBytes_24u_I(Ipp8u*
pSrcDst
, int
len
);
IppStatus ippsSwapBytes_32u_I(Ipp32u*
pSrcDst
, int
len
);
IppStatus ippsSwapBytes_64u_I(Ipp64u*
pSrcDst
, int
len
);
Include Files
ipps.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
pSrc
Pointer to the source vector.
pDst
Pointer to the destination vector.
pSrcDst
Pointer to the source and destination vector for the in-place operation.
len
Number of elements in the vector.
Description
This function reverses the endian order (byte order) of the source vector
pSrc
(
pSrcDst
for the in-place operation) and stores the result in
pDst
(
pSrcDst
). When the low-order byte is stored in memory at the lowest address, and the high-order byte at the highest address, the little-endian order is implemented.When the high-order byte is stored in memory at the lowest address, and the low-order byte at the highest address, the big-endian order is implemented. The function
ippsSwapBytes
allows to switch from one order to the other in either direction.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when any of the specified pointers is
NULL
.
ippStsSizeErr
Indicates an error when
len
is less than or equal to zero.

Example

/******************************************************************************* * Copyright 2015-2020 Intel Corporation. * * This software and the related documents are Intel copyrighted materials, and * your use of them is governed by the express license under which they were * provided to you (License). Unless the License provides otherwise, you may not * use, modify, copy, publish, distribute, disclose or transmit this software or * the related documents without Intel's prior written permission. * * This software and the related documents are provided as is, with no express * or implied warranties, other than those that are expressly stated in the * License. *******************************************************************************/ #include <stdio.h> #include "ipp.h" /* Next two defines are created to simplify code reading and understanding */ #define EXIT_MAIN exitLine: /* Label for Exit */ #define check_sts(st) if((st) != ippStsNoErr) goto exitLine; /* Go to Exit if Intel(R) Integrated Primitives (Intel(R) IPP) function returned status different from ippStsNoErr */ /* Results of ippMalloc() are not validated because Intel(R) IPP functions perform bad arguments check and will return an appropriate status */ int main() { Ipp16u vec[2] = { 0x1234, 0x5678 }; IppStatus status; printf("Source vector %X %X\n", vec[0], vec[1]); check_sts(status = ippsSwapBytes_16u_I(vec, 2)); printf("After swap \nResult vector %X %X\n", vec[0], vec[1]); EXIT_MAIN printf("\nExit status %d (%s)\n", (int)status, ippGetStatusString(status)); return (int)status; }

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804