Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

LShiftC

Shifts bits in vector elements to the left.

Syntax

IppStatus ippsLShiftC_8u(const Ipp8u*
pSrc
, int
val
, Ipp8u*
pDst
, int
len
);
IppStatus ippsLShiftC_16s(const Ipp16s*
pSrc
, int
val
, Ipp16s*
pDst
, int
len
);
IppStatus ippsLShiftC_16u(const Ipp16u*
pSrc
, int
val
, Ipp16u*
pDst
, int
len
);
IppStatus ippsLShiftC_32s(const Ipp32s*
pSrc
, int
val
, Ipp32s*
pDst
, int
len
);
IppStatus ippsLShiftC_8u_I(int
val
, Ipp8u*
pSrcDst
, int
len
);
IppStatus ippsLShiftC_16u_I(int
val
, Ipp16u*
pSrcDst
, int
len
);
IppStatus ippsLShiftC_16s_I(int
val
, Ipp16s*
pSrcDst
, int
len
);
IppStatus ippsLShiftC_32s_I(int
val
, Ipp32s*
pSrcDst
, int
len
);
Include Files
ipps.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
val
Number of bits by which the function shifts each element of the vector
pSrc
or
pSrcDst
.
pSrc
Pointer to the source vector.
pDst
Pointer to the destination vector.
pSrcDst
Pointer to the source and destination vector for the in-place operation.
len
Number of elements in the vector.
Description
This function shifts each element of the vector
pSrc
by
val
bits to the left, and stores the result in
pDst
.
The in-place flavors of
ippsLShiftC
shift each element of the vector
pSrcDst
by
val
bits to the left and store the result in
pSrcDst
.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when the
pSrc
,
pDst
,
or pSrcDst
pointer is
NULL
.
ippStsSizeErr
Indicates an error when
len
is less than or equal to 0.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804