Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

FIRSRGetSize

Computes the size of the constant structure and work buffer for single-rate FIR filtering.

Syntax

Case 1: Operation on a signal that has the same data type as the coefficients
IppStatus ippsFIRSRGetSize(int
tapsLen
, IppDataType
tapsType
, int*
pSpecSize
, int*
pBufSize
);
Case 2: Operation on a signal that has a data type different from the data type of the coefficients
IppStatus ippsFIRSRGetSize32f_32fc(int
tapsLen
, int*
pSpecSize
, int*
pBufSize
);
Include Files
ipps.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
tapsLen
Length of the FIR filter.
tapsType
Data type of the coefficients. The supported values are
ipp32f
,
ipp32fc
,
ipp64f
, and
ipp64fc
.
pSpecSize
Pointer to the size of the internal constant specification structure.
pBufSize
Pointer to the size of the work buffer required for FIR filtering.
Description
This function computes the following:
  • Size of the internal constant specification structure for single-rate FIR filtering. The structure can be shared between all threads of the application.
  • Size of the work buffer for each thread.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when one of the specified pointers is
NULL
.
ippStsSizeErr
Indicates an error when the
tapsLen
value is less than, or equal to zero.
ippStsDataTypeErr
Indicates an error when the specified taps type is not supported.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804