Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

IIRInit

Initializes an arbitrary IIR filter state.

Syntax

Case 1: Operation on integer samples
IppStatus ippsIIRInit32f_16s(IppsIIRState32f_16s**
ppState
, const Ipp32f*
pTaps
, int
order
, const Ipp32f*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit64f_16s(IppsIIRState64f_16s**
ppState
, const Ipp64f*
pTaps
, int
order
, const Ipp64f*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit64f_32s(IppsIIRState64f_32s**
ppState
, const Ipp64f*
pTaps
, int
order
, const Ipp64f*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit32fc_16sc(IppsIIRState32fc_16sc**
ppState
, const Ipp32fc*
pTaps
, int
order
, const Ipp32fc*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit64fc_16sc(IppsIIRState64fc_16sc**
ppState
, const Ipp64fc*
pTaps
, int
order
, const Ipp64fc*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit64fc_32sc(IppsIIRState64fc_32sc**
ppState
, const Ipp64fc*
pTaps
, int
order
, const Ipp64fc*
pDlyLine
, Ipp8u*
pBuf
);
Case 2: Operation on floating point samples
IppStatus ippsIIRInit_32f(IppsIIRState_32f**
ppState
, const Ipp32f*
pTaps
, int
order
, const Ipp32f*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit64f_32f(IppsIIRState64f_32f**
ppState
, const Ipp64f*
pTaps
, int
order
, const Ipp64f*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit_64f(IppsIIRState_64f**
ppState
, const Ipp64f*
pTaps
, int
order
, const Ipp64f*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit_32fc(IppsIIRState_32fc**
ppState
, const Ipp32fc*
pTaps
, int
order
, const Ipp32fc*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit64fc_32fc(IppsIIRState64fc_32fc**
ppState
, const Ipp64fc*
pTaps
, int
order
, const Ipp64fc*
pDlyLine
, Ipp8u*
pBuf
);
IppStatus ippsIIRInit_64fc(IppsIIRState_64fc**
ppState
, const Ipp64fc*
pTaps
, int
order
, const Ipp64fc*
pDlyLine
, Ipp8u*
pBuf
);
Include Files
ipps.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
pTaps
Pointer to the array containing the taps. The number of elements in the array is
2*(
order
+1)
.
order
Order of the IIR filter.
pDlyLine
Pointer to the array containing the delay line values. The number of elements in the array is
order
.
ppState
Pointer to the pointer to the arbitrary IIR state structure to be created.
pBuf
Pointer to the external buffer.
Description
This function initializes an arbitrary IIR filter state in the external buffer. The size of this buffer must be computed previously by calling the function
IIRGetStateSize
. The initialization functions copy the taps from the array
pTaps
into the state structure
pState
. The
order
-length array
pDlyLine
specifies the delay line values. If the pointer to the array
pDlyLine
is not
NULL
, the array content is copied into the context structure, otherwise the delay values of the state structure are set to 0.
The filter order is defined by the
order
value which is equal to 0 for zero-order filters. The
2*(
order
+ 1)
-length array
pTaps
specifies the taps arranged in the array as follows:
B
0
, B
1
, . . ., B
order
, A
0
, A
1
, . . ., A
order
A
0
≠ 0
If the state is not created, the initialization function returns an error status.
The initialization functions with the
32s_32f
suffixes called with floating-point taps automatically convert the taps into integer data type.
In all cases the data is converted into integer type with scaling for better precision.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when one of the specified pointers is
NULL
.
ippStsDivByZeroErr
Indicates an error when A
0
is equal to 0.
ippStsIIROrderErr
Indicates an error when
order
is less than or equal to 0.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804