Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

Div

Divides each element of the first vector by corresponding element of the second vector.

Syntax

IppStatus ippsDiv_32f_A11 (const Ipp32f*
pSrc1
, const Ipp32f*
pSrc2
, Ipp32f*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_32f_A21 (const Ipp32f*
pSrc1
, const Ipp32f*
pSrc2
, Ipp32f*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_32f_A24 (const Ipp32f*
pSrc1
, const Ipp32f*
pSrc2
, Ipp32f*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_64f_A26 (const Ipp64f*
pSrc1
, const Ipp64f*
pSrc2
, Ipp64f*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_64f_A50 (const Ipp64f*
pSrc1
, const Ipp64f*
pSrc2
, Ipp64f*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_64f_A53 (const Ipp64f*
pSrc1
, const Ipp64f*
pSrc2
, Ipp64f*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_32fc_A11 (const Ipp32fc*
pSrc1
, const Ipp32fc*
pSrc2
, Ipp32fc*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_32fc_A21 (const Ipp32fc*
pSrc1
, const Ipp32fc*
pSrc2
, Ipp32fc*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_32fc_A24 (const Ipp32fc*
pSrc1
, const Ipp32fc*
pSrc2
, Ipp32fc*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_64fc_A26 (const Ipp64fc*
pSrc1
, const Ipp64fc*
pSrc2
, Ipp64fc*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_64fc_A50 (const Ipp64fc*
pSrc1
, const Ipp64fc*
pSrc2
, Ipp64fc*
pDst
, Ipp32s
len
);
IppStatus ippsDiv_64fc_A53 (const Ipp64fc*
pSrc1
, const Ipp64fc*
pSrc2
, Ipp64fc*
pDst
, Ipp32s
len
);
Include Files
ippvm.h
Domain Dependencies
Headers:
ippcore.h
Libraries:
ippcore.lib
Parameters
pSrc1
Pointer to the first source vector.
pSrc2
Pointer to the second source vector.
pDst
Pointer to the destination vector.
len
Number of elements in the vectors.
Description
This function divides each element of the vector
pSrc1
by the corresponding element of the vector
pSrc2
and stores the result in the corresponding element of
pDst
.
For single precision data:
function flavors
ippsDiv_32f_A11
and
ippsDiv_32cf_A11
guarantee 11 correctly rounded bits of significand, or at least 3 exact decimal digits;
function flavors
ippsDiv_32f_A21
and
ippsDiv_32fc_A21
guarantee 21 correctly rounded bits of significand, or 4 ulps, or about 6 exact decimal digits;
function flavors
ippsDiv_32f_A24
and
ippsDiv_32fc_A24
guarantee 24 correctly rounded bits of significand, including the implied bit, with the maximum guaranteed error within 1 ulp.
For double precision data:
function flavors
ippsDiv_64f_A26
and
ippsDiv_64fc_A26
guarantee 26 correctly rounded bits of significand, or 6.7E+7 ulps, or approximately 8 exact decimal digits;
function flavors
ippsDiv_64f_A50
and
ippsDiv_64fc_A50
guarantee 50 correctly rounded bits of significand, or 4 ulps, or approximately 15 exact decimal digits;
function flavors
ippsDiv_64f_A53
and
ippsDiv_64fc_A53
guarantee 53 correctly rounded bits of significand, including the implied bit, with the maximum guaranteed error within 1 ulp.
The computation is performed as follows:
pDst
[n] = (
pSrc1
[n]) /(
pSrc2
[n])
,
0 ≤ n <
len
.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when
pSrc1
or
pSrc2
or
pDst
pointer is
NULL
.
ippStsSizeErr
Indicates an error when
len
is less than or equal to 0.
IppStsSingularity
In real functions, indicates a warning that the argument is the singularity point, that is, at least one of the elements of
pSrc2
is equal to 0.

Example

The example below shows how to use the function
ippsDiv
.
IppStatus ippsDiv_32f_A21_sample(void)
{
const Ipp32f x1[4] = {599.088, 735.034, 572.448, 151.640};
const Ipp32f x2[4] = {385.297, 609.005, 361.403, 225.182};
Ipp32f y[4];
IppStatus st = ippsDiv_32f_A21( x1, x2, y, 4 );
printf(" ippsDiv_32f_A21:\n");
printf(" x1 = %.3f %.3f %.3f %.3f \n", x1[0], x1[1], x1[2], x1[3]);
printf(" x2 = %.3f %.3f %.3f %.3f \n", x2[0], x2[1], x2[2], x2[3]);
printf(" y = %.3f %.3f %.3f %.3f \n", y[0], y[1], y[2], y[3]);
return st;
}
Output results:
ippsDiv_32f_A21:
x1 = 599.088 735.034 572.448 151.640
x2 = 385.297 609.005 361.403 225.182
y = 1.555 1.207 1.584 0.673

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804