Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

Trunc

Computes integer value rounded toward zero for each vector element.

Syntax

IppStatus ippsTrunc_32f (const Ipp32f*
pSrc
, Ipp32f*
pDst
, Ipp32s
len
);
IppStatus ippsTrunc_64f (const Ipp64f*
pSrc
, Ipp64f*
pDst
, Ipp32s
len
);
Include Files
ippvm.h
Domain Dependencies
Headers:
ippcore.h
Libraries:
ippcore.lib
Parameters
pSrc
Pointer to the source vector.
pDst
Pointer to the destination vector.
len
Number of elements in the vectors.
Description
This function computes an integer value rounded towards zero for each element of the vector
pSrc
, and stores the result in the corresponding element of the vector
pDst
.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when
pSrc
or
pDst
pointer is
NULL
.
ippStsSizeErr
Indicates an error when
len
is less than or equal to 0.

Example

The example below shows how to use the function
ippsTrunc
.
IppStatus ippsTrunc_32f_ sample(void)
{
const Ipp32f x[4] = {-1.883, -0.265, 0.176, 1.752};
Ipp32f y[4];
IppStatus st = ippsTrunc_32f ( x, y, 4 );
printf(" ippsTrunc_32f:\n");
printf(" x = %.3f %.3f %.3f %.3f \n", x[0], x[1], x[2], x[3]);
printf(" y = %.3f %.3f %.3f %.3f \n", y[0], y[1], y[2], y[3]);
return st;
}
Output results:
ippsTrunc_32f:
x = -1.883 -0.265 0.176 1.752
y = -1.000 0.000 0.000 1.000

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804