Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

ConjPerm

Converts the data in
Perm
format to complex data format.

Syntax

IppStatus ippsConjPerm_32fc(const Ipp32f*
pSrc
, Ipp32fc*
pDst
, int
lenDst
);
IppStatus ippsConjPerm_64fc(const Ipp64f*
pSrc
, Ipp64fc*
pDst
, int
lenDst
);
IppStatus ippsConjPerm_32fc_I(Ipp32fc*
pSrcDst
, int
lenDst
);
IppStatus ippsConjPerm_64fc_I(Ipp64fc*
pSrcDst
, int
lenDst
);
Include Files
ipps.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
pSrc
Pointer to the source vector.
pDst
Pointer to the destination vector.
pSrcDst
Pointer to the source and destination vector (for the in-place operation).
lenDst
Number of elements in the vector.
Description
This function converts the data in Perm format in the vector
pSrc
to complex data format and stores the results in
pDst
.
The in-place function
ippsConjPerm
converts the data in
Perm
format in the vector
pSrcDst
to complex data format and stores the results in
pSrcDst
.
The following table shows the examples of unpack from the
Perm
format. The
Data
column contains the real input data to be converted by the forward FFT transform to the packed data. The packed real data are in the
Packed
column. The output result is the complex data vector in the
Extended
column. The number of vector elements is in the
Length
column.
Examples of Packed Data Obtained by FFT
Data
Packed
Extended
Length
FFT([1])
1
{1, 0}
1
FFT([1 2])
3, -1
{3, 0}, {-1, 0}
2
FFT([1 2 3])
6, -1.5, 0.86
{6, 0}, {-1.5, 0.86}, {-1.5, -0.86}
3
FFT([1 2 3 9])
15, -7, -2, 7
{15, 0}, {-2, 7}, {-7, 0}, {-2, -7}
4
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when the
pSrcDst
,
pDst
, or
pSrc
pointer is
NULL
.
ippStsSizeErr
Indicates an error when
lenDst
is less than or equal to 0.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804