Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

CopyLE, CopyBE

Copies the contents of one bit vector into another.

Syntax

IppStatus ippsCopyLE_1u(const Ipp8u*
pSrc
, int
srcBitOffset
, Ipp8u*
pDst
, int
dstBitOffset
, int
len
);
IppStatus ippsCopyBE_1u(const Ipp8u*
pSrc
, int
srcBitOffset
, Ipp8u*
pDst
, int
dstBitOffset
, int
len
);
Include Files
ipps.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
Libraries:
ippcore.lib
,
ippvm.lib
Parameters
pSrc
Pointer to the source vector.
pDst
Pointer to the destination vector.
len
Number of elements to copy.
srcBitOffset
Offset, in bits, from the first byte of the source vector.
dstBitOffset
Offset, in bits, from the first byte of the destination vector.
Description
This function copies the first
len
elements from a source vector
pSrc
into a destination vector
pDst
.
These functions copy elements of a vector that has a
8u
data type. It means that each byte consists of eight consecutive elements of the vector (1 bit per element). You need to specify the start position of the source and destination vectors in the
srcBitOffset
and
dstBitOffset
parameters, respectively.
For the
ippsCopyLE_1u
function, the bit order of each byte is inverse to the element order. It means that the first element in a vector represents the last (seventh) bit of the first byte in a vector, as shown in the figure below.
Bit Layout for the
ippsCopyLE_1u
Function
For the
ippsCopyBE_1u
function, the bit order of each byte is ordinary. It means that the first element in a vector represents the last (zero) bit of the first byte in a vector, as shown in the figure below.
Bit Layout for the
ippsCopyBE_1u
Function
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when the
pSrc
or
pDst
pointer is
NULL
.
ippStsSizeErr
Indicates an error when:
  • len
    is less than, or equal to zero
  • srcBitOffset
    or
    dstBitOffset
    is less than zero

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804