Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

FGMMForeground

Performs the Gaussian mixture model foreground subtraction.

Syntax

IppStatus ippiFGMMForeground_8u_C3R(const Ipp8u*
pSrc
, int
srcStep
, Ipp8u*
pDst
, int
dstStep
, IppiSize
roi
, IppFGMMState_8u_C3R*
pState
, IppFGMModel*
pModel
, double
learning_rate
);
Include Files
ippcv.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
,
ippi.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
,
ippi.lib
Parameters
pSrc
Pointer to the source image.
srcStep
Distance, in bytes, between the starting points of consecutive lines in the source image.
pDst
Pointer to the one-channel
Ipp8u
mask of foreground.
dstStep
Distance, in bytes, between the starting points of consecutive lines in the destination image.
roi
Size of the source image ROI, in pixels.
learning_rate
Speed of algorithm learning.
pState
Pointer to the
IppFGMMState_8u_C3R
state structure.
pModel
Pointer to the
IppFGMModel
structure containing parameters for the model. If
pModel
is
NULL
, the parameters are the same as in a previous call.
Description
This function operates with ROI.
This function implements the Gaussian mixture model foreground subtraction described in [ZIVKOVIC04]. The foreground mask is stored in
pDst
.
Before using this function, you need to compute the size of the
IppFGMMState_8u_C3R
state structure and initialize the structure using the
FGMMGetBufferSize
and
FGMMInit
functions, respectively.
For an example on how to use this function, refer to the example provided with the
FGMMBackground
function description.
Return Values
ippStsNoErr
Indicates no error.
ippStsNullPtrErr
Indicates an error when
pSrc
,
pDst
,
pModel
, or
pState
is
NULL
.
ippStsSizeErr
Indicates an error when
roi
is less than, or equal to zero.
ippStsStepErr
Indicates an error when
srcStep
or
dstStep
is less than, or equal to zero.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804