Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

SumWindowColumn

Sums pixel values in the column mask applied to the image.

Syntax

IppStatus ippiSumWindowColumn_<mod>(const Ipp<srcDatatype>*
pSrc
, int
srcStep
, Ipp32f*
pDst
, int
dstStep
, IppiSize
dstRoiSize
, int
maskSize
, int
anchor
);
Supported values for
mod
:
8u32f_C1R
16u32f_C1R
16s32f_C1R
8u32f_C3R
16u32f_C3R
16s32f_C3R
8u32f_C4R
16u32f_C4R
16s32f_C4R
Include Files
ippi.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
Parameters
pSrc
Pointer to the source image ROI.
srcStep
Distance in bytes between starts of consecutive lines in the source image.
pDst
Pointer to the destination image ROI.
dstStep
Distance in bytes between starts of consecutive lines in the destination image.
dstRoiSize
Size of the destination ROI in pixels.
maskSize
Size of the vertical column mask in pixels.
anchor
Anchor cell specifying the column mask alignment with respect to the position of the input pixel.
Description
This function operates with ROI (see Regions of Interest in Intel IPP).
This function sets each pixel in the destination image ROI
pDst
as the sum of all the source image pixels in the vertical column mask of size
maskSize
with the anchor cell
anchor
at the corresponding pixel in the source image ROI
pSrc
. To ensure valid operation when image boundary pixels are processed, the application must correctly define additional border pixels (see Borders in Neighborhood Operations).
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or a warning.
ippStsNullPtrErr
Indicates an error if
pSrc
,
pDst
is
NULL
.
ippStsSizeErr
Indicates an error if
dstRoiSize
has a field with a zero or negative value.
ippStsMaskSizeErr
Indicates an error if
maskSize
has a field with a zero or negative value.
ippStsAnchorErr
Indicates an error if
anchor
is outside the mask size.
ippStsMemAllocErr
Indicates a memory allocation error.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804