Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

RGBToCbYCr422, RGBToCbYCr422Gamma

Convert 24-bit per pixel RGB image to 16-bit per pixel CbYCr image.

Syntax

IppStatus ippiRGBToCbYCr422_8u_C3C2R(const Ipp8u*
pSrc
, int
srcStep
, Ipp8u*
pDst
, int
dstStep
, IppiSize
roiSize
);
IppStatus ippiRGBToCbYCr422Gamma_8u_C3C2R(const Ipp8u*
pSrc
, int
srcStep
, Ipp8u*
pDst
, int
dstStep
, IppiSize
roiSize
);
Include Files
ippcc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
,
ippi.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
,
ippi.lib
Parameters
pSrc
Pointer to the source image ROI.
srcStep
Distance in bytes between starts of consecutive lines in the source image.
pDst
Pointer to the destination image ROI.
dstStep
Distance in bytes between starts of consecutive lines in the destination image.
roiSize
Size of the source and destination ROI in pixels.
Description
These functions operate with ROI (see Regions of Interest in Intel IPP ).
The function
ippiRGBToCbYCr422
converts the gamma-corrected
R'G'B'
image
pSrc
to the
Cb'Y'Cr'
image
pDst
according to the same formulas as the function
ippiRGBToYCbCr
does.
The function
ippiRGBToCbYCr422Gamma
performs gamma-correction of the source
RGB
image
pSrc
according to the same formula as the function
ippiGammaFwd
does, and then converts it to the
Cb'Y'Cr'
image
pDst
according to the same formulas as the function
ippiRGBToYCbCr
does.
The functions
ippiRGBToCbYCr422
and
ippiRGBToCbYCr422Gamma
use
4:2:2 sampling
format for the converted image.
A
CbYCr
image has the following sequence of bytes:
Cb0Y0Cr0Y1
,
Cb1Y2Cr1Y3
, ....
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or a warning.
ippStsNullPtrErr
Indicates an error condition if
pSrc
or
pDst
is
NULL
.
ippStsSizeErr
Indicates an error condition if
roiSize
has a field with a zero or negative value.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804