Developer Reference

  • 2020
  • 10/21/2020
  • Public Content
Contents

YCbCr422ToBGR

Converts a YCbCr image with 4:2:2 sampling to the BGR image.

Syntax

Case 1: Operation on pixel-order data
IppStatus ippiYCbCr422ToBGR_8u_C2C3R(const Ipp8u*
pSrc
, int
srcStep
, Ipp8u*
pDst
, int
dstStep
, IppiSize
roiSize
);
IppStatus ippiYCbCr422ToBGR_8u_C2C4R(const Ipp8u*
pSrc
, int
srcStep
, Ipp8u*
pDst
, int
dstStep
, IppiSize
roiSize
, Ipp8u
aval
);
Case 2: Conversion from planar to pixel-order data
IppStatus ippiYCbCr422ToBGR_8u_P3C3R(const Ipp8u*
pSrc
[3], int
srcStep
[3], Ipp8u*
pDst
, int
dstStep
, IppiSize
roiSize
);
Include Files
ippcc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
,
ippi.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
,
ippi.lib
Parameters
pSrc
Pointer to the source image ROI. An array of pointers to the ROI in each separate plane of the source planar image.
srcStep
Distance in bytes between starts of consecutive lines in the source image. An array of such distances in bytes for each plane of the source planar image.
pDst
Pointer to the destination image ROI.
dstStep
Distance in bytes between starts of consecutive lines in the destination image.
roiSize
Size of the source and destination ROI in pixels.
aval
Constant value to create the fourth channel.
Description
This function operates with ROI (see Regions of Interest in Intel IPP).
This function converts the
Y'Cb'Cr'
image
pSrc
with
4:2:2 sampling
(see Table
“Pixel-Order Image Formats”
and Table
“Planar Image Formats”
for more details) to the gamma-corrected
B'G'R'
image
pDst
according to the same formulas as the function
ippiYCbCrToRGB
does.
The output
B'G'R'
values are saturated to the range [0..255].
The fourth channel is created by setting channel values to the constant value
aval
.
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error or a warning.
ippStsNullPtrErr
Indicates an error condition if
pSrc
or
pDst
is
NULL
.
ippStsSizeErr
Indicates an error condition if
roiSize.width
is less than 2 or
roiSize.height
is less than 1.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804