Developer Reference

  • 2020
  • 07/15/2020
  • Public Content
Contents

YCoCgToSBGR_Rev

Converts a YCoCg-R image to the 48-bit BGR image.

Syntax

Case 1: Conversion to 3-channel image.
IppStatus ippiYCoCgToSBGR_Rev_16s_P3C3R(const Ipp16s*
pYCC
[3], int
yccStep
, Ipp16s*
pBGR
, int
bgrStep
, IppiSize
roiSize
);
IppStatus ippiYCoCgToSBGR_Rev_32s16s_P3C3R(const Ipp32s*
pYCC
[3], int
yccStep
, Ipp16s*
pBGR
, int
bgrStep
, IppiSize
roiSize
);
Case 2: Conversion to 4-channel image
IppStatus ippiYCoCgToSBGR_Rev_16s_P3C4R(const Ipp16s*
pYCC
[3], int
yccStep
, Ipp16s*
pBGR
, int
bgrStep
, IppiSize
roiSize
, Ipp16s
aval
);
IppStatus ippiYCoCgToSBGR_Rev_32s16s_P3C4R(const Ipp32s*
pYCC
[3], int
yccStep
, Ipp16s*
pBGR
, int
bgrStep
, IppiSize
roiSize
, Ipp16s
aval
);
Include Files
ippcc.h
Domain Dependencies
Headers:
ippcore.h
,
ippvm.h
,
ipps.h
,
ippi.h
Libraries:
ippcore.lib
,
ippvm.lib
,
ipps.lib
,
ippi.lib
Parameters
pYCC
Array of pointers to the source image ROI in each plane.
yccStep
Distance in bytes between starts of consecutive lines in the source image.
pBGR
Pointer to the destination image ROI.
bgrStep
Distance in bytes between starts of consecutive lines in the destination image.
roiSize
Size of the source and destination ROI in pixels.
aval
Constant value to create the fourth channel.
Description
This function operates with ROI (see Regions of Interest in Intel IPP ).
This function converts the
YCoCg-R
image
pYCC
to the 48-bit BGR image
pBGR
according to the following formulas:
t = Y - (Cg >> 1)
G = Cg + t
B = t - (Co >> 1)
R = B + Co
The fourth channel is created by setting channel values to the constant value
aval
.
Return Values
ippStsNoErr
Indicates no error. Any other value indicates an error.
ippStsNullPtrErr
Indicates an error condition if one of the specified pointers is
NULL
.

Product and Performance Information

1

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804